SMIC and CXMT Face Higher Costs as DUV Workarounds Reduce Yield

Chinese semiconductor manufacturers are absorbing increased production costs to bypass restrictions on extreme ultraviolet lithography. By relying on older deep ultraviolet equipment and applying multiple exposure steps, firms like SMIC and CXMT continue to produce advanced chips. Industry experts warn that this method trades efficiency for capability, resulting in lower yields and longer manufacturing cycles.

The dependency on DUV stems from export controls that have blocked ASML's EUV machines from entering China. These EUV tools use 13.5nm light to print fine features, and analysts estimate the technology gap between China and the West at five years or more. Despite this, SMIC demonstrated its capabilities in 2023 when a teardown of the Huawei Mate 60 Pro revealed a 7nm-class processor made without EUV. Recent analysis of the Kirin 9030 suggests SMIC has moved its DUV process closer to 5nm density, though it still trails TSMC and Samsung.

The technical workaround involves splitting complex designs into simpler patterns and building layers step by step. Chris Mack, CTO of Fractilia, noted that industry standards previously held three exposures on a 193 immersion tool to be cost-equivalent to one EUV pass. However, at four masks, EUV becomes the cheaper option. Mack emphasized that while chips can be made without EUV, the trade-offs are substantial. Each additional pattern requires precise alignment, leading to accumulated overlay errors. Designers often add space around features to compensate, which enlarges the chip and reduces the number of dies per wafer. Mack stated, "You don't sell wafers, you sell die."

The efficiency gap is evident in memory production. A June Morgan Stanley report estimated that CXMT produces only one-third as many bits per wafer as Western rivals. The bank labeled lithography access a "hard ceiling" for Chinese memory development. Mack cautioned that node labels like 5nm or 3nm have limited standalone meaning, noting that SMIC's N+3 process remains less scaled than established 5nm processes from competitors.

DUV technology still has room for advancement. Micron developed its 1-alpha DRAM without EUV, using multiple patterning and tight process control. Mack said Micron "pushed 193 farther than any of the other memory makers did." Morgan Stanley considers CXMT's planned move to 1-alpha DRAM for HBM3e achievable without EUV. Douglas Fuller, a researcher at Copenhagen Business School, expects advanced packaging to allow DUV use for the latest DRAM generations by the end of the decade. Mack added that China could make significant progress with the full 193 immersion ecosystem, though he noted memory is easier to scale than logic.

Micron eventually adopted EUV for its 1-gamma DRAM, which offers more than 30% greater bit density than its predecessor. While EUV has its own drawbacks, such as stochastic effects requiring higher exposure doses, Mack said he would be "hard pressed" to believe 3nm or 2nm nodes are economically viable without it. Chinese chipmakers are not expected to stall. They will continue pushing DUV while accepting larger dies, poorer yields, or longer times. Morgan Stanley projects CXMT will lift its share of global DRAM bit supply from 14% in 2026 to 16% in 2028 through new capacity. The bank also expects China's AI chip self-sufficiency to rise from 42% in 2025 to 70% by 2030.